High frequency switch and communication apparatus

专利摘要:
A high frequency switch, has a first signal terminal; a first diode the cathode of which is directly or indirectly connected to the first signal terminal; bias controlling means an end of which is connected to the anode of the first diode; a second signal terminal directly or indirectly connected to the anode of the first diode; impedance converting means an end of which is directly or indirectly connected to the first signal terminal; a serial circuit having high frequency voltage dividing means of dividing high frequency voltage and a second diode, the serial circuit being connected to the other end of the impedance converting means; and a third signal terminal directly or indirectly connected to the other end of the impedance converting means; wherein the switching on/off of the bias controlling means implements the conduction between the first signal terminal and the second signal terminal or the conduction between the first signal terminal and the third signal terminal.
公开号:US20010009387A1
申请号:US09/759,452
申请日:2001-01-16
公开日:2001-07-26
发明作者:Hiroshi Isono；Kaoru Ishida
申请人:Panasonic Corp；
IPC主号:H03K17-76

专利说明:
[0001] 1. Field of the Invention [0001]
[0002] The present invention relates to a high frequency switch used in a communication apparatus and the like, such as a portable terminal. [0002]
[0003] 2. Related Art of the Invention [0003]
[0004] An example of a prior art high frequency switch is described in Japanese Laid-Open Patent Publication No. Hei 6-197039. [0004]
[0005] FIG. 5 is a schematic diagram of a prior art high frequency switch. In FIG. 5, numerals [0005] 63, 64 and 65 are capacitors. Numeral 66 is a first strip line. Numeral 67 is a capacitor. Numerals 68 and 69 are resistors. Numeral 71 is a first diode. Numeral 72 is a second strip line. Numeral 70 is a second diode. Numeral 73 is a capacitor. Numerals 74 and 76 are resistors. Numeral 75 is a first control terminal. And, numeral 77 is a second control terminal.
[0006] The operation of a prior art high frequency switch having such a configuration is as follows. First, in the case that TX is connected to ANT, a voltage is provided to the first control terminal [0006] 75, whereby the first diode 71 and the second diode 70 become ON, whereby TX and ANT are connected. At that time, because of the ON state of the second diode 70, the impedance from TX through the second strip line 72 to RX becomes infinity, whereby no high frequency signal flows to RX when TX is connected to ANT.
[0007] Next, in the case that RX is connected to ANT, a voltage is provided to the second control terminal [0007] 77, whereby the first diode 71 and the second diode 70 are provided with an inverse bias. Accordingly, a fault switching, does not occur even when a high power signal is input in the normal direction of the diode.
[0008] A prior art high frequency switch is as described above. However, in case that a higher power is provided in the prior art configuration, a higher current in the normal direction of each diode [0008] 70, 71 is necessary in order to connect TX to ANT. Further, a higher inverse voltage between the anode and the cathode of each diode 70, 71 is necessary in order to satisfy distortion characteristics when RX is connected to ANT.
[0009] Here, in order to increase the inverse voltage between the anode and the cathode of each diode [0009] 70, 71, it is possible to add an inverse bias circuit composed of resistors 74, 76 and the like. However, this causes a larger circuit scale of the switch, and hence is not advantageous for the use in a small portable terminal and the like, such as a cellular telephone and a PHS.
[0010] Further, in the configuration that a circuit other than a diode element (second diode [0010] 70) is directly connected on the RX side as shown in the prior art example of the inverse bias circuit composed of the resistors 74, 76 and the like, the isolation possibly degrades when TX is connected to ANT, because an ideal short circuit is not obtained by the ON state of each diode 70, 71. SUMMARY OF THE INVENTION
[0011] The present invention has been devised considering such problems. An object of the present invention is to provide a high frequency switch workable on a single power supply, capable of switching without fault switching, and capable of avoiding the degradation of isolation. [0011]
[0012] One aspect of the present invention is a high frequency switch, comprising: [0012]
[0013] a first signal terminal; [0013]
[0014] a first diode the cathode of which is directly or indirectly connected to said first signal terminal; [0014]
[0015] bias controlling means an end of which is connected to the anode of said first diode; [0015]
[0016] a second signal terminal directly or indirectly connected to the anode of said first diode; [0016]
[0017] impedance converting means an end of which is directly or indirectly connected to said first signal terminal; [0017]
[0018] a serial circuit having high frequency voltage dividing means of dividing high frequency voltage and a second diode, the serial circuit being connected to the other end of said impedance converting means; and [0018]
[0019] a third signal terminal directly or indirectly connected to said other end of said impedance converting means; wherein [0019]
[0020] the switching on/off of said bias controlling means implements the conduction between said first signal terminal and said second signal terminal or the conduction between said first signal terminal and said third signal terminal. [0020]
[0021] Another aspect of the present invention is the high frequency switch of one aspect, comprising short-circuit implementing means connected to the cathode of said second diode for canceling a parasitic component during transmission and for becoming substantially unconnected during reception. [0021]
[0022] Still another aspect of the present invention is the high frequency switch of one or another aspect, comprising isolation improving means connected to said first diode in parallel. [0022]
[0023] Still yet another aspect of the present invention is the high frequency switch of any one of one to still another aspects, said high frequency voltage dividing means comprising at least a diode the anode of which is directly or indirectly connected to the cathode of said second diode in series. [0023]
[0024] A further aspect of the present invention is the high frequency switch of any one of one to still yet another aspects, said high frequency voltage dividing means comprising a resistor directly or indirectly connected to the cathode of said second diode in series. [0024]
[0025] A still further aspect of the present invention is the high frequency switch of any one of one to still another aspects, said high frequency voltage dividing means being a parallel circuit composing at least a diode the cathode of which is grounded and a resistor. [0025]
[0026] A yet further aspect of the present invention is the high frequency switch of another aspect, said short-circuit implementing means comprising at least a capacitor. [0026]
[0027] A still yet further aspect of the present invention is the high frequency switch of another aspect, said isolation improving means comprising at least an inductor and/or at least a capacitor. [0027]
[0028] An Additional aspect of the present invention is a communication apparatus comprising a high frequency switch of any one of one to a still yet further aspects. [0028]
[0029] In such a high frequency switch of the present invention, each anode of a first diode and a second diode is connected to the side of a bias control terminal, whereby workability on a single power supply is achieved. Resonance circuits are connected to the first diode and the second diode in order to eliminate the parasitic component of the diodes, whereby the isolation of the switch is improved. High frequency voltage dividing means connected to the first resonance circuit in parallel divides the voltage supplied on the diode into a lower voltage, whereby the distortion characteristics of the diode is improved. Accordingly, fault switching does not occur even when a high power signal is input in the normal direction during the OFF duration of the diode. [0029] BRIEF DESCRIPTION OF THE DRAWINGS
[0030] FIG. 1 is a block diagram of a high frequency switch in accordance with Embodiment 1 of the present invention. [0030]
[0031] FIG. 2([0031] a) is a block diagram of a high frequency switch provided with a diode and short-circuit implementing means comprising at least an inductor and/or a capacitor in accordance with Embodiment 2 of the present invention.
[0032] FIG. 2([0032] b) is a circuit diagram showing an example of a specific configuration of short-circuit implementing means.
[0033] FIG. 3([0033] a) is a block diagram of a high frequency switch provided with isolation improving means for a diode in accordance with Embodiment 3 of the present invention.
[0034] FIG. 3([0034] b) is a circuit diagram showing examples of a specific configuration of isolation improving means.
[0035] FIG. 4 is a circuit diagram showing examples of a configuration of high frequency voltage dividing means in accordance with Embodiment 4 of the present invention. [0035]
[0036] FIG. 5 is a block diagram of a high frequency switch in accordance with a prior art. [0036]
[0037] FIG. 6 is a block diagram of another exemplary configuration of a high frequency switch in accordance with Embodiment 1 of the present invention. [0037] DESCRIPTION OF THE REFERENCE NUMERALS
[0038] [0038] 1 High frequency switch
[0039] [0039] 2, 3, 4, 7 Capacitor
[0040] [0040] 5, 6 Transmission line
[0041] [0041] 8 Control terminal
[0042] [0042] 9, 10 Diode
[0043] [0043] 11 High frequency voltage dividing means
[0044] [0044] 100 ANT terminal
[0045] [0045] 200 TX terminal
[0046] [0046] 300 RX terminal PREFERRED EMBODIMENTS OF THE INVENTION
[0047] The embodiments of a high frequency switch of the present invention are described below with reference to the drawings. [0047]
[0048] (Embodiment 1) [0048]
[0049] Embodiment 1 of a high frequency switch of the present invention is described below with reference to FIG. 1. FIG. 1 is a circuit block diagram of a high frequency switch of the embodiment. In the figure, numeral [0049] 1 designates a high frequency switch of Embodiment 1. Numerals 2, 3 and 4 are capacitors. Numerals 5 and 6 are transmission lines corresponding to impedance converting means. Numeral 7 is a capacitor. Numeral 8 is a control terminal for supplying a bias voltage. Numeral 9 is a first diode. Numeral 10 is a second diode. Numeral 11 is high frequency voltage dividing means. Numeral 110 is a serial circuit having the second diode 10 and the high frequency dividing means 11. Numeral 100 is an ANT terminal corresponding to a first signal terminal of the present invention. Numeral 200 is a TX terminal corresponding to a second signal terminal of the present invention. And, numeral 300 is an RX terminal corresponding to a third signal terminal of the invention. Bias controlling means of the present invention corresponds to the circuit composed of the transmission line 5, the capacitor 7, and the control terminal 8.
[0050] The operation in the embodiment having the above-mentioned configuration is as follows. [0050]
[0051] First, in the case that the ANT terminal [0051] 100 is connected to the TX terminal 200, a predetermined voltage is provided to the control terminal 8, thereby causing the same operation as the prior art example.
[0052] Next, in the case that the ANT terminal [0052] 100 is connected to the RX terminal 300, the voltage provided on the control terminal 8 is set to 0 V. In this case, the first diode 9 and the second diode 10 become OFF. When a high power signal is input through the ANT terminal 100 in this state, the voltage to be provided on the diode 10 is divided into a lower voltage by the high frequency voltage dividing means 11. This suppresses the occurrence of distortion, thereby avoiding the occurrence of fault switching.
[0053] The above-mentioned description has been made for the case in which the high frequency voltage dividing means [0053] 11 of the serial circuit 110 is provided between the cathode of the second diode 10 and the ground. However, the high frequency voltage dividing means 11 may be inserted between the anode of the second diode 10 and the connection point thereof to the transmission line 6. That is, the necessary condition is that a high frequency voltage dividing means of the present invention composes a serial circuit of the present invention together with the second diode 10 so as to be capable of dividing the voltage to be provided on the second diode 10.
[0054] (Embodiment 2) [0054]
[0055] A high frequency switch of Embodiment 2 of the present invention is described below with reference to FIG. 2. FIG. 2 is a circuit block diagram of a high frequency switch of the embodiment. In the figure, numeral [0055] 12 designates a high frequency switch of Embodiment 2. Numerals 13, 14 and 15 are capacitors. Numerals 16 and 17 are transmission lines corresponding to impedance converting means. Numeral 20 is a capacitor. Numeral 21 is a control terminal for supplying a bias voltage. Numeral 18 is a first diode. Numeral 19 is a second diode. Numeral 22 is short-circuit implementing means. And, numeral 23 is high frequency voltage dividing means. Bias controlling means of the present invention corresponds to the circuit composed of the transmission line 16, the capacitor 20, and the control terminal 21.
[0056] The operation in the embodiment having the above-mentioned configuration is as follows. [0056]
[0057] First, in the case that an ANT terminal [0057] 100 is connected to a first TX terminal 200, a predetermined voltage is provided to the control terminal 8, thereby causing the first diode 18 and the second diode 19 to be ON. At that time, the second diode 19 generates a serial resonance with the short-circuit implementing means 22 connected in series, whereby the parasitic component is canceled, and an ideal short-circuit state is achieved.
[0058] Next, in the case that the ANT terminal [0058] 100 is connected to the RX terminal 300, the operation is carried out similarly to that of Embodiment 1. Further, in the present embodiment, the short-circuit implementing means 22 has a high resistance at high frequencies, and hence is substantially unconnected.
[0059] As such, in accordance with the present embodiment, the isolation between the ANT terminal [0059] 100 and a second RX terminal 300 can be improved.
[0060] Here, the short-circuit implementing means [0060] 22 may be any circuit capable of forming a resonance circuit in cooperation with the second diode 19. A circuit of any appropriate combination of diodes, inductors and capacitors may be used for this means depending on the situation. For example, the short-circuit implementing means 22 may be a serial circuit consisting of an inductor 22 a and a capacitor 22 b as shown in FIG. 2(b). The means may be implemented by a circuit consisting of a capacitor 22 b alone. As such, short-circuit implementing means 22 of the present invention is preferably composed of at least a capacitor.
[0061] (Embodiment 3) [0061]
[0062] A high frequency switch of Embodiment 3 of the present invention is described below with reference to FIG. 3. FIG. 3 is a circuit block diagram of a high frequency switch of the embodiment. In the figure, numeral [0062] 24 designates a high frequency switch of Embodiment 3. Numerals 25, 26 and 27 are capacitors. Numerals 28 and 29 are transmission lines corresponding to impedance converting means. Numeral 31 is a capacitor. Numeral 30 is a control terminal for supplying a bias voltage. Numeral 32 is a first diode. Numeral 33 is a second diode. Numeral 34 is isolation improving means. And, numeral 35 is high frequency voltage dividing means. Bias controlling means of the present invention corresponds to the circuit composed of the transmission line 29, the capacitor 31, and the control terminal 30.
[0063] The operation in the embodiment having the above-mentioned configuration is as follows. [0063]
[0064] First, in the case that the ANT terminal [0064] 100 is connected to the TX terminal 200, a predetermined voltage is provided to the control terminal 30, thereby causing the same operation as the prior art example.
[0065] Next, in the case that the ANT terminal [0065] 100 is connected to the RX terminal 300, the voltage provided on the control terminal 30 is set to 0 V. In this case, the first diode 33 and the second diode 32 become OFF. At that time, the first diode 33 generates a parallel resonance with the isolation improving means 34 connected in parallel, whereby the isolation between the ANT terminal 100 and the TX terminal 200 is improved, and the reverse current is prevented.
[0066] As such, in accordance with the present embodiment, the isolation between the ANT terminal [0066] 100 and the TX terminal 200 can be improved.
[0067] Here, the isolation improving means [0067] 34 may be any circuit connected to the first diode 33 in parallel and capable of forming a resonance circuit in cooperation therewith. Example circuits usable as an isolation improving means 34 depending on the situation include: an inductor 341 connected in parallel with the diode 33; a parallel circuit 342 consisting of a capacitor 342 a and an inductor 342 b; and a capacitor 343; each connected in parallel with the diode 33 as shown in FIG. 3(b). As such, isolation improving means of the invention is preferably composed of at least an inductor and/or at least a capacitor.
[0068] (Embodiment 4) [0068]
[0069] A high frequency switch of Embodiment 4 of the invention is described below with reference to FIG. 4. FIG. 4([0069] a) is a partial circuit block diagram showing the part from the common ANT terminal 100 to the second RX terminal 300 of FIG. 1 used for the description of Embodiment 1. That is, the part from the ANT terminal 100 to the first TX terminal 200 is omitted. FIGS. 4(b) to 4(e) are circuit block diagrams showing a high frequency voltage dividing means 40 (equivalent to the high frequency voltage dividing means 11 of FIG. 1) having various configurations. In FIGS. 4(a) to 4(e), numerals 36 and 37 are capacitors. Numeral 38 is a second diode (equivalent to the second diode 10 of FIG. 1). Numeral 40 is high frequency voltage dividing means. Numeral 110 is a serial circuit having the second diode 38 and the frequency voltage dividing means 40. And, numeral 39 is a transmission line of impedance converting means. In FIG. 4(b), numeral 45 is a diode. In FIG. 4(c) numeral 50 is a resistor. In FIG. 4(d) numeral 55 is a diode, and numeral 56 is a resistor. In FIG. 4(e), numeral 61 is a resistor, and numeral 62 is a diode.
[0070] The operation in the embodiment having the above-mentioned configuration is as follows. [0070]
[0071] In an exemplary configuration of the high frequency voltage dividing means [0071] 40 shown in FIG. 4(b), a diode 45 is connected to a second diode 38 in series, whereby the voltage is divided. Here, two or more diodes may be connected in series. The voltage to be provided on the second diode 38 is divided depending on the number of diode(s) connected, whereby the distortion characteristics is further improved.
[0072] In an exemplary configuration of the high frequency voltage dividing means [0072] 40 shown in FIG. 4(c), a resistor 50 is connected to a second diode 38 in series, whereby a similar effect to that of the configuration example of FIG. 4(b) is obtained. Similarly to the above-mentioned configuration example, two or more resistors may be connected in series, whereby a similar effect is obtained.
[0073] The high frequency voltage dividing means [0073] 40 may be implemented by a parallel circuit consisting of a diode 55 and a resistor 56 as shown in FIG. 4(d). Further, the means may be implemented by a serial circuit consisting of a resistor 61 and a diode 62 as shown in FIG. 4(e). In both cases, a similar effect to that of the above-mentioned configuration example is obtained. Here, similarly to the Embodiment 1, it is sufficient that the high frequency voltage dividing means 40 is composes a serial circuit of the present invention together with the second diode 38. Thus, instead that the means is provided between the cathode of the second diode 38 and the ground, the means may be inserted between the anode of the second diode 38 and the connection point thereof to the transmission line 39.
[0074] A high frequency switch in accordance with each above-mentioned embodiment permits the miniaturization of a communication apparatus and the reduction of the power consumption thereof. [0074]
[0075] The description of each above-mentioned embodiment has been made for the case that each impedance converting means of the present invention corresponds a strip line [0075] 5, 16, 29. However, the configuration of the present invention is not restricted to this. That is, any configuration capable of converting the impedance may be used as the impedance converting means.
[0076] The description of each above-mentioned embodiment has been made for the case that the high frequency switch comprises capacitors [0076] 2, 3, 4, 13, 14, 15, 25, 26, 27, 36, 37. However, these capacitors may be omitted in a high frequency switch of the invention.
[0077] As is understood from the above-mentioned description, the present invention provides a high isolation. Further, since distortion characteristics is improved without an inverse bias circuit, the invention permits the miniaturization of a circuit and the reduction of the current consumption thereof. [0077]

权利要求:
Claims (9)
[1" id="US-20010009387-A1-CLM-00001] 1. A high frequency switch, comprising:
a first signal terminal;
a first diode the cathode of which is directly or indirectly connected to said first signal terminal;
bias controlling means an end of-which is connected to the anode of said first diode;
a second signal terminal directly or indirectly connected to the anode of said first diode;
impedance converting means an end of which is directly or indirectly connected to said first signal terminal;
a serial circuit having high frequency voltage dividing means of dividing high frequency voltage and a second diode, the serial circuit being connected to the other end of said impedance converting means; and
a third signal terminal directly or indirectly connected to said other end of said impedance converting means; wherein
the switching on/off of said bias controlling means implements the conduction between said first signal terminal and said second signal terminal or the conduction between said first signal terminal and said third signal terminal.
[2" id="US-20010009387-A1-CLM-00002] 2. The high frequency switch of
claim 1 , comprising short-circuit implementing means connected to the cathode of said second diode for canceling a parasitic component during transmission and for becoming substantially unconnected during reception.
[3" id="US-20010009387-A1-CLM-00003] 3. The high frequency switch of
claim 1 or
2 , comprising isolation improving means connected to said first diode in parallel.
[4" id="US-20010009387-A1-CLM-00004] 4. The high frequency switch of any one of
claims 1 to
3 , said high frequency voltage dividing means comprising at least a diode the anode of which is directly or indirectly connected to the cathode of said second diode in series.
[5" id="US-20010009387-A1-CLM-00005] 5. The high frequency switch of any one of
claims 1 to
4 , said high frequency voltage dividing means comprising a resistor directly or indirectly connected to the cathode of said second diode in series.
[6" id="US-20010009387-A1-CLM-00006] 6. The high frequency switch of any one of claims 1 -to 3, said high frequency voltage dividing means being a parallel circuit composing at least a diode the cathode of which is grounded and a resistor.
[7" id="US-20010009387-A1-CLM-00007] 7. The high frequency switch of claim2, said short-circuit implementing means comprising at least a capacitor.
[8" id="US-20010009387-A1-CLM-00008] 8. The high frequency switch of
claim 2 , said isolation improving means comprising at least an inductor and/or at least a capacitor.
[9" id="US-20010009387-A1-CLM-00009] 9. A communication apparatus comprising a high frequency switch of any one of
claims 1 to
8 .

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法律状态:
2001-01-16| AS| Assignment|Owner name: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD., JAPAN Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:ISONO, HIROSHI;ISHIDA, KAORU;REEL/FRAME:011464/0043 Effective date: 20001227 |

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2003-03-12| STCF| Information on status: patent grant|Free format text: PATENTED CASE |

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2006-09-08| FPAY| Fee payment|Year of fee payment: 4 |

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2010-09-01| FPAY| Fee payment|Year of fee payment: 8 |

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2014-09-19| FPAY| Fee payment|Year of fee payment: 12 |

优先权:

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申请号 | 申请日 | 专利标题

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JP2000012285||2000-01-20||

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JP2000-012,285||2000-01-20||

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JP2000-012285||2000-01-20||

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